Motivation p559

• Run programs larger than physical memory → Need Disk + RAM
• Creates an abstraction over Disk + RAM → Virtual Memory

Address Spaces p560

• Virtual address space: per-process, linear, larger / $N=2^n$
• Physical address space: system-wide, non-contiguous, smaller / $M=2^m$

Paging

• Divide memory into fixed-size pages
• Virtual pages (VPs) stored on disk, subset cached in physical pages (PPs)
• Page size typically 4KB to 4MB

Page Table p562

• Per-process data structure mapping VPs to PPs
• Page Table Entry (PTE) (a row in the page table) contain
  • Valid bit: is VP in physical memory?
  • Permission bits: read/write/execute access
  • PPN (Physical Page Number): location of VP in physical memory
  • Disk address: location of VP on disk if not in memory

Address Translation p567

<aside> ℹ️ Abbreviations

• MMU: Memory Management Unit

• VPN: Virtual Page Number

• VPO: Virtual Page Offset

• VA: Virtual Address

• VA = [VPN] [VPO] </aside>

• MMU(VA) → PA (Physical Address) p569

  • Walks page table to find PPN
  • If valid bit = 0, triggers page fault exception
  • Else, PA = PPN + VPO

• TLB (Translation Lookaside Buffer) caches VA to PA translations p570

  • TLB is a small cache in MMU

Page Fault Handling p569

1. Select victim page in physical memory (if dirty, write back to disk)
2. Load faulting VP from disk into physical memory